MEMS Revolutionized With Picosun's Batch ALD Cluster Tools

Picosun Oy, the leading supplier of high quality ALD (Atomic Layer Deposition) thin film coating solutions for industrial production, has revolutionized cost-effective MEMS manufacturing with high throughput PICOPLATFORM batch ALD cluster technology.

MEMS (MicroElectroMechanical Systems; Microsystems) are micrometer-scale, semiconductor-based components that combine e.g. electrical, mechanical, and optical functions. They are present in our everyday electronics in products such as hard disk read heads, inkjet printer nozzles, microphone and videoprojector chips, and airbag controls, tire pressure monitoring, and driving stability systems in cars.

Fast, fully automated and economically feasible batch processing without compromising the strictest process quality and purity requirements of the semiconductor industries is the prerequisite for industrial breakthrough of the next generation MEMS devices. They realize improved data storage, mobile phone, GPS positioning, and automotive control electronics, and health care applications such as body area sensors and remote monitoring devices. Combining batch ALD processing with fully automatic, robotized PICOPLATFORM vacuum cluster systems enables super-fast throughput of MEMS chips with excellent yield, process purity and uniformity levels(*).

“Our MEMS customers gain immense benefits from our SEMI S2 certified PICOPLATFORM cluster technology. Equipped with our production-proven PICOSUN P-series batch ALD tools, these cluster systems have already proven their worth at the manufacturing sites of leading, global microsystems industries. Considering the MEMS market growth forecasts, propelled by the coming era of the Internet-of-Things, this product line will definitely be one of the cornerstones of our industrial ALD business,” states Mr. Timo Malinen, Chief Operating Officer of Picosun.

(*) Within-wafer, wafer-to-wafer, and batch-to-batch film thickness non-uniformity values (1σ) measured with 50 nm Al2O3 process on 200 mm Si wafers (25 wafers/batch) < 1%. The development work for batch ALD cluster technology has been performed in the project Lab4MEMS (1.1.2013 - 31.12.2015), coordinated by ST Microelectronics.

The project Lab4MEMS has received funding from the EC under the ENIAC Nanoelectronics Framework Programme (ENIAC-2012-2) under grant agreement no 325622-2.